Thursday, March 21, 2024

Renesas Targets Graphics and Multimodal AI With Second-Gen RA8 MCUs

When Renesas unveiled its RA8 microcontroller unit in October, it aimed to bridge the gap between microprocessors (MPUs) and microcontrollers (MCUs) using the Arm Cortex-M85 core.

 

RA8D1

Renesas aims to “bridge the gap” between MPUs and MCUs with RA8 lineup. Image (modified) used courtesy of Renesas

 

The RA8D1 continues the lineup, achieving 6.39 Coremark/MHz, and is equipped with display functions not present in earlier devices. 

 

Optimized Feature Set for Graphics Displays

Like its predecessor, RA8M1, the RA8D1 is equipped with a 480-MHz Arm Cortex M85 core with 2 MB of flash. One of the critical features introduced with the RA8 series—and present in the RA8D1—is Arm's Helium technology, an M-Profile Vector Extension (MVE) for the Cortex-M processor series. This feature boosts the performance of the core for machine learning and data processing applications.

The RA8D1 extends the capabilities of RA8M1 by supporting new graphics assets such as an LCD controller and support for MIPI-DSI and parallel RGB. It also has a 32-bit external SDRAM interface. Since it uses the Arm Cortex M85, it is equipped with Arm TrustZone for added security. 


Block diagram of RA8D1 MCU

Block diagram of RA8D1 MCU. Image used courtesy of Renesas
 

According to the datasheet, there are four human-machine interfaces on the RA8D1: a graphics LCD controller, a 2D drawing engine, a capture engine unit, and an MIPI-DSI interface. The primary purpose of the graphics LCD controller is to provide video output and an interface with different LCD displays. The 2D drawing engine supports advanced functions such as rasterization and image texturing. Finally, the MIPI DSI interface provides a direct interface to displays that support the MIPI Alliance DSI protocol. This protocol is commonly used in automotive and embedded applications with low EMI, low power, and performant color rendering abilities.

MIPI DSI uses a physical layer protocol called D-PHY to transmit video data using differential signaling from a transmitter to a receiver. DSI also provides a bidirectional channel for sending command codes from a processor to a display and receiving responses from the peripheral.

 

MIPI DSI

MIPI DSI uses D-PHY differential signaling to send video. Image used courtesy of SemiWiki

 

The datasheet for the RA8D1 indicates that the DSI transmitter is D-PHY compliant. By lowering signaling voltage, D-PHY uses an alternate low power (ALP) state to reduce overall power consumption for short-length (< 4 m) data transmission. 

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